1. Field of the Invention
The present invention relates to a semiconductor integrated circuit that is formed on a semiconductor film provided through an insulating film, known as xe2x80x9csilicon on insulatorxe2x80x9d (SOI) on a supporting substrate.
2. Description of the Related Art
FIG. 3A shows a structure of a conventional transistor provided on an SOI layer. The transistor is formed on a supporting substrate 1 provided with an insulating film 2 and has a polysilicon gate electrode 20, a gate insulating film 21, source and drain regions 22 and 23, a LOCOS 26, contacts 24 and 25, an interlayer insulating film 27, and metal wirings 28 and 29. Here, in the transistor for operation with low voltage, the thickness of the SOI layer is 100 nm or less, and the thickness of the insulating film on the supporting substrate is approximately 100 nm. Since the SOI layer is very thin, the source and drain regions 22 and 23 reach the 2 insulating film 2 on the supporting substrate 1. Further, the gate insulating film 21 is very thin in order to perform the operation with low voltage.
In recent years, low power consumption semiconductor integrated circuits have been demanded, and low voltage operation of internal circuits has been progressing. The shift to low voltage is easy in a digital circuit portion used for signal processing and the like, but the shift to low voltage is difficult in an interface portion, for example, a display portion and a radio transmitting and receiving portion. Therefore, the interface portion is operated with a high voltage. In order to mount an interface circuit or the like on a semiconductor integrated circuit consisting of transistors that operate with a low voltage, a method of thickening only a gate insulating film 30 of a transistor that handles a high voltage is used, as shown in FIG. 3B. With such a structure, the desired withstand voltage of the gate insulating film is secured and the reliability is improved.
Further, with respect to the transistor for operation with low voltage, the need to provide a countermeasure for static electricity protection is a problem. Since the structure of the transistor is intended for operation with low voltage, the transistor is immediately destroyed when a high voltage such as static electricity enters the transistor. Thus, a protective transistor is added in order to release the static electricity from the transistor. However, since the SOI layer is thin, and the source and drain regions 22 and 23 reach the insulating film 2 on the supporting substrate 1, a junction area of a PN junction is very small in comparison with a bulk device. Therefore, the size of the protective transistor is considerably large. Besides, since a 501 device is covered with an oxide film, there is no current path for a case where negative static electricity enters the transistor. Therefore, the transistor has to be further added with a diode for dealing with negative static electricity.
In the semiconductor integrated circuit formed on the SOI layer, the difference in thickness of a gate oxide film is prepared between a transistor with low voltage operation and a transistor with high withstand voltage operation, in other words, a thin gate oxide film and a thick gate oxide film are formed on the transistor with low voltage operation and the transistor with high withstand voltage operation, respectively, in a case where the transistor with low voltage operation and the transistor with high withstand voltage operation are mixedly mounted on the integrated circuit. In this case, a gate oxidization step should-be performed twice, which leads to an increase of steps. Further, in a case where two separate gate oxidization steps are performed, it is difficult to control the thickness of the gate oxide film with high precision. In the transistor for aiming at the low voltage operation, the gate oxide film is very thin, and thus, the precision of the thickness largely affects the circuit characteristics. Therefore, it is extremely difficult to mixedly mount the transistor with low voltage operation and the transistor with high withstand voltage operation on the semiconductor integrated circuit.
Further, a circuit that requires the transistor with high withstand voltage operation is an interface circuit in many cases, and this interface circuit is driven with a large current. Thus, generation of heat of the transistor is large. Particularly in a case where this transistor is a SOI device, since the transistor is covered by the oxide film, generated heat cannot be radiated. Therefore, the temperature of the transistor rises, which leads to change in the characteristics and heat destruction.
In addition, the protective transistor for static electricity of the SOI device that operates with a low voltage, the SOI layer is thin, and the source and drain regions reach the insulating film on the supporting substrate. Thus, the junction area of the PN junction is very small in comparison with the bulk device. Therefore, static electricity cannot be completely released with the protective transistor for static electricity with the same size as that used in the conventional bulk device, and thus, this transistor reaches static electricity destruction and Joule heat destruction. Accordingly, the size of the protective transistor is very large. Besides, since the SOI device is covered with the oxide film, there is no current path for a case where negative static electricity enters the transistor.
Therefore, there is a problem in that the transistor has to be further added with the diode for dealing with negative static electricity. Further, in a case where the protective transistor is the SOI device, the transistor is covered with the oxide film, and thus, the temperature of the transistor rises because the heat generated in releasing static electricity cannot be radiated. This leads to changes in the characteristics and heat destruction.
According to the present invention, in a semiconductor integrated circuit in which a CMOS transistor is formed on an layer, a high withstand voltage transistor is formed, which is constituted of a hole or opening that passes through the SOI layer and reaches an insulating film on a supporting substrate, a gate electrode comprised of the SOI layer surrounded by the hole and an oxide film, a gate oxide film comprised of the insulating film on the supporting substrate, and source and drain regions formed in the supporting substrate at a bottom surface of the hole, which contact the insulating film on the supporting substrate. A transistor that operates with a low voltage is formed on the SOI layer, and a transistor that operates with a high withstand voltage is formed by a transistor having the structure of the present invention. Therefore, the transistor with low voltage operation and the transistor with high withstand voltage can be mixedly mounted on the semiconductor integrated circuit formed on the SOI layer, and also it is sufficient that a gate oxidization step is performed once. Thus, low cost is realized. Further, a large current is flown in the transistor with high withstand voltage, which is used on a transistor chip with low voltage operation in many cases. However, a current flows on the surface of the supporting substrate so that the generated heat spreads over the whole supporting substrate. Thus, a local temperature rise is avoided.
In the transistor constituted of the hole that passes through the SOI layer and reaches the insulating film on the supporting substrate, the gate electrode comprised of the SOI layer surrounded by the hole and the oxide film, the gate oxide film comprised of the insulating film on the supporting substrate, and the source and drain regions formed on the portions of the bottom surface of the hole, which contact the insulating film on the supporting substrate, the transistor has polysilicon formed on the gate electrode comprised of the SOI layer through the oxide film, and the polysilicon contacts a side surface and a part of the bottom surface of the hole and is connected with the gate electrode comprised of the SOI layer. By using the transistor structured above as a protective transistor for static electricity, since the thickness of the gate oxide film at the end of the drain region is the same as that of the gate oxide film of the internal circuit, an avalanche breakdown voltage becomes the same. Thus, static electricity can be released. Further, after the avalanche breakdown, bipolar operation starts. However, since the source and drain regions are formed on the supporting substrate, an area of a PN junction of the transistor corresponds to a thickness of the SOI layer multiplied by a channel width plus bottom surfaces of the source and drain regions, and an allowable current to heat destruction of a junction portion becomes very large. Thus, the transistor can be formed with a smaller size compared with a case where the protective transistor is formed by the SOI device. Moreover, the transistor has a current path from the supporting substrate to the drain region for a case where negative static electricity enters the transistor, and thus, the diode does not have to be added. Furthermore, since the entered static electricity flows on the supporting substrate, the generated heat is radiated through the supporting substrate. Thus, the allowable current to the heat destruction becomes large.